[Suzaku:00907] Re: suzaku のボードについて
mio
email@hidden
2007年 5月 11日 (金) 17:07:26 JST
$BCfEg$G$9!#(B
email@hidden wrote:
> $BCfEg!!MM(B
> $B!!!!!!!!$*@$OC$K$J$j$^$9(B
> $B!!!!!!!!(BFPGA$B$N(BSDRAM$B!2(BCTL$BIt=$@58e(Bgenerate netlist$B$NCJ3,!!%(%i!<$,H/@8$7$^$7(B
> $B$?(B
> $B!!!!!!!!0J2<$O$=$N%a%C%;%8!<$G$9(B
> $B!!!!!!!!$^$?!!(Bxx.mhs$B$N%U%'%$%k$rE>Aw$7$^$9$N$G(B
>
> $B!!!!!!!!$h$m$7$/$*4j$$$7$^$9(B
>
> $B!!!!:E(B
>
> $B!v!v!v!v(B
>
> At Local date and time: Fri May 11 10:25:15 2007
> xbash -q -c "cd /cygdrive/f/suzaku_sdram/; /usr/bin/make -f xps_proj.make
> netlist; exit;" started...
> ****************************************************
>
> Creating system netlist for hardware specification..
>
> ****************************************************
> platgen -p xc3s1200efg320-4 -lang vhdl xps_proj.mhs
>
>
> Release Xilinx EDK 8.2.02 - platgen EDK_Im_Sp2.4
> Copyright (c) 1995-2006 Xilinx, Inc. All rights reserved.
>
>
>
> Command Line: platgen -p xc3s1200efg320-4 -lang vhdl xps_proj.mhs
>
> Parse xps_proj.mhs ...
>
> Read MPD definitions ...
>
> ERROR:MDT - F:\suzaku_sdram\xps_proj.mhs line 74 - PARAMETER
> C_FSL_DATA_SIZE has
> value 0 which does not fall in the range (32), specified in MPD
>
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C_FSL_DATA_SIZE$B$,(B0$B$email@hidden$5$l$F$$$k$_$?$$$G$9!#(B
PARAMETER$B!!(BC_FSL_DATA_SIZE
$B$,5-=R$5$l$F$$$kItJ,$r(Bmhs$B%U%!%$%k$NCf$+$iC5$7$F!"(B
0 --> 32$B$KJQ99$9$k$+!"(B
$B$?$V$sI,MW$J$$$H;W$o$l$k$N$G!"$3$N0lJ8$r>C5n$7$F$7$^$C$F$/$@$5$$!#(B
> Sourcing tcl file
> D:/EDK/hw/XilinxProcessorIPLib/pcores/microblaze_v4_00_b/data/microblaze_v2_1_0.
> tcl ...
> Sourcing tcl file
> D:/EDK/hw/XilinxProcessorIPLib/pcores/mch_opb_sdram_v1_00_a/data/mch_opb_sdram_v
> 2_1_0.tcl ...
>
> Sourcing tcl file
> D:/EDK/hw/XilinxProcessorIPLib/pcores/lmb_bram_if_cntlr_v1_00_b/data/lmb_bram_if
> _cntlr_v2_1_0.tcl ...
> Sourcing tcl file
> D:/EDK/hw/XilinxProcessorIPLib/pcores/opb_intc_v1_00_c/data/opb_intc_v2_1_0.tcl
> ...
>
> Sourcing tcl file
> D:/EDK/hw/XilinxProcessorIPLib/pcores/lmb_v10_v1_00_a/data/lmb_v10_v2_1_0.tcl
> ...
> Sourcing tcl file
> D:/EDK/hw/XilinxProcessorIPLib/pcores/opb_emc_v2_00_a/data/opb_emc_v2_1_0.tcl
> ...
>
> Sourcing tcl file
> D:/EDK/hw/XilinxProcessorIPLib/pcores/opb_spi_v1_00_e/data/opb_spi_v2_1_0.tcl
> ...
> Sourcing tcl file
> D:/EDK/hw/XilinxProcessorIPLib/pcores/dcm_module_v1_00_a/data/dcm_module_v2_1_0.
> tcl ...
>
>
>
> Overriding IP level properties ...
> opb_sil00 (opb_sil00_0) -
> F:\suzaku_sdram\pcores\opb_sil00_v1_01_b\data\opb_sil00_v2_1_0.mpd line 29
> -
> tool overriding c_family value virtex2p to spartan3e
> microblaze (microblaze_i) -
> D:\EDK\hw\XilinxProcessorIPLib\pcores\microblaze_v4_00_b\data\microblaze_v2_1_0.
> mpd line 64 - tool overriding c_family value virtex2 to spartan3e
> microblaze (microblaze_i) -
> D:\EDK\hw\XilinxProcessorIPLib\pcores\microblaze_v4_00_b\data\microblaze_v2_1_0.
> mpd line 65 - tool overriding c_instance value microblaze to microblaze_i
> microblaze (microblaze_i) -
> D:\EDK\hw\XilinxProcessorIPLib\pcores\microblaze_v4_00_b\data\microblaze_v2_1_0.
> mpd line 94 - tcl overriding C_ADDR_TAG_BITS value 17 to 11
> microblaze (microblaze_i) -
> D:\EDK\hw\XilinxProcessorIPLib\pcores\microblaze_v4_00_b\data\microblaze_v2_1_0.
> mpd line 101 - tcl overriding C_DCACHE_ADDR_TAG value 17 to 11
> mch_opb_sdram (sdram_controller) -
> D:\EDK\hw\XilinxProcessorIPLib\pcores\mch_opb_sdram_v1_00_a\data\mch_opb_sdram_v
> 2_1_0.mpd line 44 - tool overriding c_family value virtex2p to spartan3e
> Sourcing tcl file
> D:/EDK/hw/XilinxProcessorIPLib/pcores/sdram_v1_01_a/data/sdram_v2_1_0.tcl
> ...
> opb_timer (system_timer) -
> D:\EDK\hw\XilinxProcessorIPLib\pcores\opb_timer_v1_00_b\data\opb_timer_v2_1_0.mp
> d line 36 - tool overriding c_family value nofamily to spartan3e
> bram_block (bram_block_0) -
> D:\EDK\hw\XilinxProcessorIPLib\pcores\bram_block_v1_00_a\data\bram_block_v2_1_0.
> mpd line 43 - tool overriding c_family value virtex2 to spartan3e
> opb_intc (system_intc) -
> D:\EDK\hw\XilinxProcessorIPLib\pcores\opb_intc_v1_00_c\data\opb_intc_v2_1_0.mpd
> line 38 - tool overriding c_family value virtex2 to spartan3e
> opb_emc (system_memcon) -
> D:\EDK\hw\XilinxProcessorIPLib\pcores\opb_emc_v2_00_a\data\opb_emc_v2_1_0.mpd
> line 41 - tool overriding c_family value virtex2 to spartan3e
> opb_gpio (opb_gpio_0) -
> D:\EDK\hw\XilinxProcessorIPLib\pcores\opb_gpio_v3_01_b\data\opb_gpio_v2_1_0.mpd
> line 42 - tool overriding c_family value virtex2 to spartan3e
> opb_spi (spi_flash) -
> D:\EDK\hw\XilinxProcessorIPLib\pcores\opb_spi_v1_00_e\data\opb_spi_v2_1_0.mpd
> line 48 - tool overriding c_family value virtex2 to spartan3e
> dcm_module (dcm_14_multi) -
> D:\EDK\hw\XilinxProcessorIPLib\pcores\dcm_module_v1_00_a\data\dcm_module_v2_1_0.
> mpd line 61 - tool overriding c_family value virtex2 to spartan3e
> dcm_module (dcm_sdram_fb) -
> D:\EDK\hw\XilinxProcessorIPLib\pcores\dcm_module_v1_00_a\data\dcm_module_v2_1_0.
> mpd line 61 - tool overriding c_family value virtex2 to spartan3e
> opb_gpio (led_gpio) -
> D:\EDK\hw\XilinxProcessorIPLib\pcores\opb_gpio_v3_01_b\data\opb_gpio_v2_1_0.mpd
> line 42 - tool overriding c_family value virtex2 to spartan3e
>
> Performing IP level DRCs on properties...
>
> Running DRC Tcl procedures for OPTION IPLEVEL_DRC_PROC...
>
> Sourcing tcl file
> D:/EDK/hw/XilinxProcessorIPLib/pcores/bram_if_cntlr_v1_00_b/data/bram_if_cntlr_v
> 2_1_0.tcl ...
>
> Sourcing tcl file
> D:/EDK/hw/XilinxProcessorIPLib/pcores/bram_if_cntlr_v1_00_b/data/bram_if_cntlr_v
> 2_1_0.tcl ...
>
> Sourcing tcl file
> D:/EDK/hw/XilinxProcessorIPLib/pcores/emc_common_v2_00_a/data/emc_common_v2_1_0.
> tcl ...
> WARNING
> ***********************************************************************
> WARNING ** DCM Module
> WARNING
> ***********************************************************************
> WARNING ** It is strongly recommended to always set the
> C_DUTY_CYCLE_CORRECTION
> WARNING ** parameter to TRUE.
> WARNING
> ***********************************************************************
> WARNING
> ***********************************************************************
> WARNING ** DCM Module
> WARNING
> ***********************************************************************
> WARNING ** C_CLKIN_BUF = TRUE. It is recommended to set this
> WARNING ** parameter FALSE.
> WARNING
> ***********************************************************************
> WARNING
> ***********************************************************************
> WARNING ** DCM Module
> WARNING
> ***********************************************************************
> WARNING ** C_CLKFB_BUF = TRUE. It is recommended to set this
> WARNING ** parameter FALSE.
> WARNING
> ***********************************************************************
> Address Map for Processor microblaze_i
> (0x00000000-0x00001fff) d_lmb_bram_if_cntlr d_lmb_v10
> (0x00000000-0x00001fff) i_lmb_bram_if_cntlr i_lmb_v10
> (0x80000000-0x80ffffff) sdram_controller d_opb_v20
> (0x80000000-0x80ffffff) sdram_controller microblaze_IXCL
> (0x80000000-0x80ffffff) sdram_controller microblaze_DXCL
> (0xff000000-0xff0001ff) spi_flash d_opb_v20
> (0xffe00000-0xffe0ffff) system_memcon d_opb_v20
> (0xffff1000-0xffff10ff) system_timer d_opb_v20
> (0xffff2000-0xffff20ff) console_uart d_opb_v20
> (0xffff3000-0xffff30ff) system_intc d_opb_v20
> (0xffffa000-0xffffa1ff) opb_gpio_0 d_opb_v20
> (0xffffa200-0xffffa3ff) led_gpio d_opb_v20
> (0xffffa600-0xffffa6ff) opb_uartlite_0 d_opb_v20
> (0xffffd000-0xffffd1ff) opb_sil00_0 d_opb_v20
>
> Check platform address map ...
>
> Overriding system level properties ...
> lmb_bram_if_cntlr (d_lmb_bram_if_cntlr) -
> D:\EDK\hw\XilinxProcessorIPLib\pcores\lmb_bram_if_cntlr_v1_00_b\data\lmb_bram_if
> _cntlr_v2_1_0.mpd line 46 - tool overriding c_mask value 0x00800000 to
> 0x80000000
> lmb_bram_if_cntlr (i_lmb_bram_if_cntlr) -
> D:\EDK\hw\XilinxProcessorIPLib\pcores\lmb_bram_if_cntlr_v1_00_b\data\lmb_bram_if
> _cntlr_v2_1_0.mpd line 46 - tool overriding c_mask value 0x00800000 to
> 0x80000000
> bram_block (bram_block_0) -
> D:\EDK\hw\XilinxProcessorIPLib\pcores\bram_block_v1_00_a\data\bram_block_v2_1_0.
> mpd line 39 - tool overriding c_memsize value 2048 to 0x2000
> opb_intc (system_intc) -
> D:\EDK\hw\XilinxProcessorIPLib\pcores\opb_intc_v1_00_c\data\opb_intc_v2_1_0.mpd
> line 46 - tool overriding c_num_intr_inputs value 2 to 5
> opb_intc (system_intc) -
> D:\EDK\hw\XilinxProcessorIPLib\pcores\opb_intc_v1_00_c\data\opb_intc_v2_1_0.mpd
> line 47 - tool overriding c_kind_of_intr value
> 0b11111111111111111111111111111111 to 0b00000000000000000000000000001010
> opb_intc (system_intc) -
> D:\EDK\hw\XilinxProcessorIPLib\pcores\opb_intc_v1_00_c\data\opb_intc_v2_1_0.mpd
> line 48 - tool overriding c_kind_of_edge value
> 0b11111111111111111111111111111111 to 0b00000000000000000000000000001010
> opb_intc (system_intc) -
> D:\EDK\hw\XilinxProcessorIPLib\pcores\opb_intc_v1_00_c\data\opb_intc_v2_1_0.mpd
> line 49 - tool overriding c_kind_of_lvl value
> 0b11111111111111111111111111111111
> to 0b00000000000000000000000000010001
> opb_v20 (d_opb_v20) -
> D:\EDK\hw\XilinxProcessorIPLib\pcores\opb_v20_v1_10_c\data\opb_v20_v2_1_0.mpd
> line 40 - tool overriding c_num_masters value 4 to 2
> opb_v20 (d_opb_v20) -
> D:\EDK\hw\XilinxProcessorIPLib\pcores\opb_v20_v1_10_c\data\opb_v20_v2_1_0.mpd
> line 41 - tool overriding c_num_slaves value 4 to 10
> lmb_v10 (i_lmb_v10) -
> D:\EDK\hw\XilinxProcessorIPLib\pcores\lmb_v10_v1_00_a\data\lmb_v10_v2_1_0.mpd
> line 40 - tool overriding c_lmb_num_slaves value 4 to 1
> lmb_v10 (d_lmb_v10) -
> D:\EDK\hw\XilinxProcessorIPLib\pcores\lmb_v10_v1_00_a\data\lmb_v10_v2_1_0.mpd
> line 40 - tool overriding c_lmb_num_slaves value 4 to 1
>
>
> Running DRC Tcl procedures for OPTION SYSLEVEL_DRC_PROC...
> Sourcing tcl file
> D:/EDK/hw/XilinxProcessorIPLib/pcores/sdram_v1_01_a/data/sdram_v2_1_0.tcl
> ...
>
> Sourcing tcl file
> D:/EDK/hw/XilinxProcessorIPLib/pcores/intc_core_v1_00_c/data/intc_core_v2_1_0.tc
> l ...
>
> Performing System level DRCs on properties...
> ERROR:MDT - F:\suzaku_sdram\xps_proj.mhs line 74 - PARAMETER
> C_FSL_DATA_SIZE has
> value 0 which does not fall in the range (32), specified in MPD
>
> Running UPDATE Tcl procedures for OPTION PLATGEN_SYSLEVEL_UPDATE_PROC...
> INFO: The sdram_controller core has constraints automatically generated by
> XPS in
> implementation/sdram_controller_wrapper/sdram_controller_wrapper.ucf.
> It can be overridden by constraints placed in the system.ucf file.
>
> ERROR:MDT - platgen failed with errors!
>
> make: *** [implementation/opb_sil00_0_wrapper.ngc] Error 2
>
> Done!
>
>
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> mio
> <email@hidden
> o.com> $email@hidden(B
> $BAw?.<T(B: SUZAKU general discussion list
> email@hidden <email@hidden>
> sts.atmark-techno cc
> .com
> $B7oL>(B
> [Suzaku:00903] Re: suzaku $B$N%\!<%I(B
> 2007/05/10 20:23 $B$K$D$$$F(B
>
>
> SUZAKU general
> discussion list
> <email@hidden
> ark-techno.com>
> $B$X(B
> $BJV?.$7$F$/$@$5$$(B
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> $BCfEg$G$9!#(B
>
> email@hidden wrote:
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>> SDRAM$B%3%s%H%m!<%i$N$H$3$m!!$J$I(B
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>
> http://lists.atmark-techno.com/pipermail/suzaku/2006-October/000661.html
>
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