[Suzaku-en:00499] uartlite problems again

Alberto Perasic email@hidden
Wed Nov 14 06:17:42 JST 2007


hi

At first i want to tanks to every one who answer my questions
about " write a driver for the suzaku -v"

well, after a week of try and error, read, watch for exmaples in the mail list..
i finally get my driver for "uarlite" working in the suzaku-V. That
was in the morning.uff
i build a simple program that put a 0x55 on the fifo write address
position of the uart in infinite loop:
this is the code

#include <stdio.h>
#include <stdlib.h>
#include <fcntl.h>
#include <unistd.h>
#include "reg_access.h"

#define FPGAAddr 0xF0FFB000
#define FPGADEVICE "/dev/fpga"//Memory mapped UARTLITE
int handlemem;


//int main(int argc, char * argv[])
int main(void)
{

char buf[1];
int i;
buf[0] = 0x55;
        printf("UARTL FPGA Register at %X\n",FPGAAddr);
        handlemem = open(FPGADEVICE,O_RDWR);
                if(handlemem == -1) {
                        // printf("FPGA Memory access could not be opened\n");
                }
                else {
                       // printf("FPGA Memory access opened OK\n");

                 //pwrite(handlemem, buf, 1, 4);
                }

                while(1)
                {

                //writeReg();
                //readReg();

                for(i=1;i<100000;i++){}//delay

                 pwrite(handlemem, buf, 1, 4);

                }

        return 0;
}//main

based on the Ford Sleeman's device driver example... and corrections
on the Makefile

the program and the driver do work, as i see in the oscilocope
but, my happines was no longer, because after 5 minutes aprox of
working  this program crash
and the following text whas displayed.:   ... if i put some delay, the
prorgam run for longer time..but crash any way


# chmod 755 uartlite
# ./uartlite
UARTL FPGA Register at F0FFB000
__alloc_pages: 0-order allocation failed (gfp=0x1f0/0)
Oops: kernel access of bad area, sig: 11
NIP: C008AD34 XER: 00000000 LR: C008ACF4 SP: C1E83F00 REGS: c1e83e50 TRAP: 0800
   Not tainted
MSR: 00008030 EE: 1 PR: 0 FP: 0 ME: 0 IR/DR: 11
DEAR: 00000004, ESR: 00800000
TASK = c1e82000[60] 'uartlite' Last syscall: 180
last math 00000000 last altivec 00000000
GPR00: 00000000 C1E83F00 C1E82000 00000000 00000004 00000000 00000004 00000000
GPR08: 00000005 00000055 00000001 00000000 84000022 00000000 00000000 00000000
GPR16: 00000000 00000000 00000000 00000000 00008030 01E83F40 00000000 C0002948
GPR24: C00026A0 00000000 00000001 7FFFFED4 7FFFFDD8 C0441FE0 00000001 C1E83F28
Call backtrace:
C008ACF4 C0034FF4 C00026FC 10000380 30025D44 30025D90 00000000
__alloc_pages: 0-order allocation failed (gfp=0xf0/0)
__alloc_pages: 0-order allocation failed (gfp=0x1d2/0)
VM: killing process sh
__alloc_pages: 0-order allocation failed (gfp=0xf0/0)
__alloc_pages: 0-order allocation failed (gfp=0xf0/0)
__alloc_pages: 0-order allocation failed (gfp=0x1d2/0)
VM: killing process init
__alloc_pages: 0-order allocation failed (gfp=0xf0/0)
__alloc_pages: 0-order allocation failed (gfp=0xf0/0)
__alloc_pages: 0-order allocation failed (gfp=0xf0/0)
__alloc_pages: 0-order allocation failed (gfp=0xf0/0)

I have no clues at the moment of what is the problem with the software
or the driver or...
next is the code of the driver if some one can help me... may be
something with the memory allocation..?

#include <linux/config.h>
#include <linux/init.h>
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/fs.h>
#include <linux/mm.h>
#include <linux/slab.h>
#include <asm/io.h>
#include <asm/uaccess.h>

int fpga_major = 250;
#define FPGA_BASE 0xF0FFB000
#define FPGA_MAX 0xF0FFB0FF
static void *io_base;

MODULE_LICENSE("GPL");

ssize_t fpga_read(struct file *filp, char *buf, size_t count, loff_t *f_pos)
{
        int retval;
        void *add;
        unsigned char *kbuf, *ptr;

        kbuf = kmalloc(count, GFP_KERNEL);
        if (!kbuf) return -ENOMEM;
        ptr = kbuf;
        retval = count;

        int i;
        for(i = *f_pos; i < count + *f_pos; i++)
        {
                add = io_base + i;
                ptr[i - *f_pos] = readb(add);
        }

        copy_to_user(buf, kbuf, retval);


        kfree(kbuf);
        *f_pos += retval;

        return retval;
}

ssize_t fpga_write(struct file *filp, unsigned char *buf, size_t
count, loff_t *f_pos)
{
        unsigned char *kbuf, *ptr;
        kbuf = kmalloc(count, GFP_KERNEL);

        int ret = copy_from_user(kbuf, buf, count);

        void* location = ioremap(FPGA_BASE, (long)count);
        int i;

        for(i = *f_pos; i < count + *f_pos; i++)
        {
                writeb(kbuf[i - *f_pos], location + i);
        }

        iounmap(location);
        return 0;
}

struct file_operations fpga_fops = {
    .owner = THIS_MODULE,
    .read  = fpga_read,
    .write = fpga_write,

};

static int fpga_init(void)
{
        int result = register_chrdev(250, "fpga", &fpga_fops);
       // int result = register_chrdev_region(
        io_base = ioremap(FPGA_BASE, FPGA_MAX - FPGA_BASE);
        printk(" **Driver FPGA cargado**: %d\n",result);
        return 0;
}

static void fpga_exit(void)
{
        printk("Closing register driver.\n");
}

module_init(fpga_init);
module_exit(fpga_exit);

MODULE_LICENSE("GPL v2");
MODULE_AUTHOR(" A P");
MODULE_DESCRIPTION("Driver para UartLite");

Regards


Alberto Perasic F.



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