[Suzaku-en:00583] SV: Re: VB: Problems with the sz410 XPS project files

Gudmund Johansson email@hidden
Thu Apr 24 21:32:39 JST 2008


Thanks for answer.
The point is that I cannot even get the original suzaku-project through ("xps_proj.xmp", no new add-on modules so far).
When starting a virgin project in the ISE based on the original "xps_proj.xmp" I read the following:

"ERROR: generating XPS instantiation template failed!" 
 
and in next line:

"ERROR: the hdl template for xps_proj.xmp could not be found"

/Gudmund


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Skickat: den 24 april 2008 13:37
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Ämne: [Suzaku-en:00582] Re: VB: Problems with the sz410 XPS project files

Hi.
>  Please see the mailing below
> 
> /
> Gudmund Johansson
> Swedish Space Corporation
> Stockholm
> Sweden
> 
> ------------------------------------------------------------------------
> ------
> This is actually exactly what I tried to do, but when hitting then
> export to ISE I met the following answer:
> 
> "This flow is deprecated in XPS.
> Recommended flow is to intantiate XMP as a source in Project Navigator."
> 
Please refer to Help of Xilinx Platform Studio 9.2i.
  Help -> Help Topics
"Creating an XPS Design as an ISE Submodule" is maybe useful.

> /Gudmund
> 
>> Hello Gudmund,
>>
>> Thank you for using our product. I'm Fumito Morishima and work for
> Atmark > Techno, Inc as the sales manager.
>> The project file that we provide is not able to be opened by ISE
> directly. > You need to indicate "xps_proj.xmp" file from XPS. When you
> use SUZAKU,    > we'd like you to extend it's function based on XPS
> project file which we    > provide for SUZAKU. If you want to add your
> original circuit to SUZAKU,    > please use exporting function from XPS
> to ISE project.
>> By the way, there is mailing list for SUZAKU user. If you have any
> further > questions, please post them to ML. You're able to join it from
> URL below:
>> http://suzaku-en.atmark-techno.com/dev/mailinglist
>>
>> Regards
>> Fumito Morishima
> 
>>> Hello,
>>> I'm trying the sz410 board and I am now about to add an own logical 
>>> module to it according to the Xilinx tutorial "EDK 9.2 PowerPC 
>>> Tutorial in Virtex-4". However, when I run the the original design 
>>> itself, I get the following error message within the ISE environment:
>>>
>>> ERROR: the hdl template for xps_proj.xmp could not be found. Make
> sure 
>>> the XPS project is complete.
>>>
>>> Can you help me to solve this case? 
>>> Thank you!
>>>
>>>

regards.

-- 
mio
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